HDD Servo Processing Subsystem Architecture Lead

WD is building the infrastructure behind the AI-driven data economy. As AI scales, so does data. Every interaction, every model, every system generates data that must be stored, managed, and made accessible over time. That’s where we come in. We combine deep engineering expertise with global-scale manufacturing to deliver the storage systems that make AI possible, powering hyperscale data centers, cloud platforms, and enterprise infrastructure worldwide. This isn’t theoretical work. It’s real systems, at real scale, people solving some of the hardest challenges in technology today. We’re looking for people who want to build, solve, and operate at that level. Join us and let’s shape the future of data. We are seeking an experienced HDD Servo Processing Subsystem Architecture Lead to join our organization in San Jose, CA, United States. In this pivotal role, you will drive the strategic vision and execution of the servo real-time compute platform architecture—encompassing firmware architecture, instruction set architecture (ISA), and SoC microarchitecture—to enable next-generation HDD products with multiple concurrent data streams and multi-actuator control. You will be accountable for defining a coherent, scalable platform strategy that balances technical feasibility with economic viability across program schedules, power envelopes, and cost constraints. ESSENTIAL DUTIES AND RESPONSIBILITIES Define and maintain a future-state servo real-time compute architecture and ISA that scales from single to multiple concurrent data streams and supports concurrent control of multiple actuators and heads, with explicit guidance to SoC and servo teams on power, area, and performance trade-offs Co-lead SoC microarchitecture decisions affecting servo compute, including core count and placement, memory hierarchy, interconnect design, and dynamic control accelerators, ensuring that FPGA prototype work and accelerator designs map cleanly into production-ready firmware and tools models Own servo compute resource management and budgeting, including instruction/data memory allocation, processor cycle and path-length limits, and regression thresholds; drive adherence through continuous integration practices to prevent late-stage resource conflicts Lead the co-design of firmware platform architecture, including core control-loop implementations, multi-cluster and multi-actuator orchestration, and cross-generation stability, ensuring deterministic real-time performance across multiple SoC generations Drive evolution of the servo compute tooling ecosystem—including internal compiler, real-time compute platform simulator, Renode-based system simulation, debug and diagnostics tools, and profiling/debug flows—to support multi-cluster, multi-stream characterization and debugging Coordinate across geographically distributed teams (servo firmware, SoC architecture/design, recording subsystem/algorithms, servo tools, manufacturing firmware, and test) to align platform decisions with program risk, schedules, yield, and customer experience objectives Deliver a major multi-stream and multi-actuator capability that meets control performance and power targets on a new SoC generation, demonstrating the viability of the defined architecture and ISA Analyze and optimize servo loop performance through modeling, simulation, and real-world validation using tools such as MATLAB and Simulink, with focus on multi-actuator control scenarios and high-bandwidth data paths Communicate technical concepts, architectural trade-offs, and strategic recommendations to senior management and cross-functional stakeholders, providing architectural guidance throughout the product development lifecycle REQUIRED Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or an equivalent degree and professional experience Master's degree or relevant professional certification (e.g., in embedded systems, real-time architecture) desirable PhD or specialist certification with demonstrated expertise in real-time, multi-core computing platform architecture highly desirable 10+ years of professional experience in embedded architecture and development, with specific focus on real-time control, storage technology, or related servo control applications 5+ years of experience as a project technical leader or in senior technical leadership roles, demonstrating strong leadership and commitment to delivering results Deep expertise in digital signal processing and real-time systems development Demonstrated experience with FPGA and/or ASIC design for servo processing applications SKILLS Advanced programming skills in C/C++ and experience with hardware description languages (HDL) Proficiency with MATLAB, Simulink, and other modeling and simulation tools Deep expertise with specialized simulation and development tools including Renode, Verilator, and LLVM Solid understanding of hardware-software co-design and system-level integration Strong proficiency in servo control theory, including loop design, stability analysis, and performance optimization highly desirable Proven ability to lead cross-functional engineering teams across geographically distributed locations and manage complex technical projects Excellent analytical and problem-solving skills with meticulous attention to detail Excellent communication, interpersonal, and collaborative skills, including strong presentation abilities, with demonstrated capability to work effectively across worldwide engineering teams in English Experience with product development lifecycle and design for manufacturability principles Familiarity with industry standards and best practices in storage technology Ability to work effectively in a fast-paced, collaborative environment WD is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (in